A-level Computing/Processing and Programming Techniques/Machine Level Structure
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Inside the CPU
The CPU contains an arithmetic-logic unit (ALU), where arithmetic functions are carried out, a control unit, which sends control signals to the memory and peripherals, the system clock, which keeps the various components in correct time with each other, and several registers, which are special memory locations that each have a specific purpose.
Registers
The registers inside a typical processor are:
- Accumulator, also called general purpose register
- The accumulator is a temporary storage space for arithmetic operations. Without it, the result of every operation would have to be written to main memory, and then read back into the ALU, which is very slow. For example, to add up a list of numbers, they are loaded one by one from main memory and added into the accumulator. The final answer is then copied back to main memory.
- Current instruction register
- The current instruction register stores the instruction that is currently being executed.
- Memory address register
- The memory address register stores the address of data or instructions that are to be accessed from main memory.
- Memory data register
- The memory data register stores data that has been read from, or is about to be written to, the main memory.
- Program counter, also called sequence control register
- The program counter stores the address of the next instruction to be fetched from main memory.
- Status register
- The status register contains flag bits that are set or cleared depending on the result of the last instruction. The overflow bit is an example of a status flag in the status register.
The Fetch-Excecute Cycle
When the processor fetches and executes an instruction, it makes use of the registers. The steps that the CPU follows for the assembly language instruction LDA A3 (Load the number at address A3 into the accumulator) are:
- 1. First, the program counter is read for the address of the next instruction to be executed.
- 2. The contents of the program counter are copied to the memory address register.
- 3. The required address in main memory is found, and the contents of that are copied to the memory data register.
- 4. The program counter is incremented by one, since the old value has already been fetched.
- 5. The contents of the memory data register are copied to the current instruction register.
- 6. The instruction in the current instruction register is decoded. The instruction is "load the contents of memory location A3 into the accumulator".
- 7. "A3" is copied into the memory address register, and the correct memory location is found. The contents of A3 are copied to the memory data register, and then into the accumulator. The instruction has been executed.
- 8. The program counter is read for the next instruction to be executed...
This process may seem very slow and cumbersome, but a modern computer can do this cycle millions of times per second.
Interrupts
CPU Performance
There are three main factors of a processor that affect its performance.
Clock Speed
The system clock measures time in beats and most operations can be carried out in one beat. The clock speed measures the number of beats per second. A CPU with a clock speed of 1GHz would measure 1,000,000,000 beats per second.
Word Length
The word size of a computer is the number of bits that the CPU can process simultaneously.
Bits may be grouped into 8-, 16-, 32-, 64- or 128-bit 'words', and processed as a unit during input and output, arithmetic and logic instructions.
A processor that has a larger word size will operate faster than a processor with a smaller one.
Bus Width
Both the addresses of data and instructions, and the data and instructions, are transmitted along buses.
The width of the address bus determines the maximum address that can be directly referenced.
The width of the data bus determines how many bits can be transferred simultaneously. This is usually, but not always, the same word size of the computer. For example, not all computers which have a 32-bit word length will have a 32-bit data bus, and so the data may have to be fetched in two groups of 16 bits.